1. Field of the Invention
The present invention relates to a semiconductor display device using a semiconductor element (an element using a semiconductor thin film). Further, the present invention relates to electronic equipment using the semiconductor display device in a display portion.
2. Description of the Related Art
Techniques of using a semiconductor thin film (on the order of several nni to several hundreds of nm thick) formed on a substrate having an insulating surface in order to form a thin film transistor (TFT) have been in the spotlight in recent years. Thin film transistors are widely applied to electronic devices such as ICs and semiconductor display devices, and in particular, are rapidly being developed as switching elements for liquid crystal display devices and EL display devices.
EL display devices are also referred to as organic EL displays (OELDs) and as organic light-emitting diodes (OLEDs).
EL display devices are self-light-emitting. EL devices have a structure in which a layer containing an organic compound (EL layer) is sandwiched between a pair of electrodes (an anode and a cathode), and the EL layer usually has a lamination structure. A lamination structure of a hole transporting layer, a light-emitting layer, and an electron transporting layer developed by Tang, et al., of Eastman Kodak Company can be given as a typical lamination structure. This structure has extremely high light-emitting efficiency, and most of the EL display devices currently being researched and developed employ this structure.
Electro luminescence generated by the addition of an electric field is obtained in the EL element, which has an anode layer, an EL layer, and a cathode layer. There is emission of light in the organic compound when returning to a base state from a singlet excitation state (fluorescence), and when returning to a base state from a triplet excitation state (phosphorescence), and the EL display device of the present invention may use both types of light emission.
Further, a structure in which a hole injecting layer, a hole transporting layer, a light-emitting layer, and an electron transporting layer are laminated in order on an anode; and a structure in which a hole injecting layer, a hole transporting layer, a light-emitting layer, an electron transporting layer, and an electron injecting layer are laminated in order on an anode may also be used. Doping, of a material such as a fluorescent pigment into the light-emitting layer may also be performed.
All layers formed between an anode and a cathode are referred to generically as an EL layer within this specification. The above stated hole injecting layer, hole transporting layer, light-emitting layer, electron transporting layer, and electron injecting layer are therefore all contained within the EL layer.
Note that the emission of light by the EL element is referred to as driving of the EL element in this specification. Note also that, throughout this specification, light-emitting elements formed by an anode, an EL layer, and a cathode are referred to as EL elements.
An active matrix EL display device has a pixel portion with a plurality of pixels, each of which has a TFT and an EL element. An image is displayed in the pixel portion by controlling the electric current flowing in the EL element with TFT.
In particular, a high mobility can be obtained from a TFT using a semiconductor film having a crystalline structure as an active layer (crystalline TFT), and it is therefore possible to integrate functionality circuits on the same substrate and realize a high definition image display.
Semiconductor films having a crystalline structure include single crystal semiconductors, polycrystalline semiconductors, and microcrystalline semiconductors in this specification, and in addition, include the semiconductors disclosed in Japanese Patent Application Laid-open No. Hei 7-130652, Japanese Patent Application Laid-open No. Hei 8-78329, Japanese Patent Application Laid-open No. Hei 10-135468, and Japanese Patent Application Laid-open No. Hei 10-135469.
Between one million and two million crystalline TFTs are necessary in only a pixel matrix circuit (hereafter referred to as pixel portion) in order to structure the active matrix EL display device, and more than that number of crystalline TFTs are required for the attached functionality circuits formed in the periphery. The specifications required for the EL display device are strict, and in order to perform stable image display, it is necessary to assure the reliability of each crystalline TFT.
TFT characteristics can be considered as divided between those of an on state and those of an offstate. Characteristics such as on current, mobility, S-value, and threshold value are known as on state characteristics, and off current is the most important off state characteristic.
However, there is a problem in that the off current easily becomes high with crystalline TFTs.
Furthermore, crystalline TFTs are still not used in MOS transistors (transistors manufactured on a single crystalline semiconductor substrate) using LSIs from a reliability standpoint. For example, a degradation phenomenon in which the mobility and the on current (the electric current flowing when the TFT is in an on state) drop, and the off current (the electric current flowing when the TFT is in an off state) rise, when a crystalline TFT is continuously driven have been observed. It is thought that the hot carrier effect is the cause, and that the degradation phenomenon is caused by hot carriers developing due to a high electric field in the vicinity of a drain.
A lightly doped drain (LDD) structure is known as a method of lowering the off current in a MOS transistor by relieving the high electric field in the vicinity of the drain. A low concentration impurity region is formed on the outside of a channel region with this structure, and the low concentration impurity region is referred to as an LDD region.
In particular, the high electric field in the vicinity of the drain is relieved, the hot carrier effect can be prevented, and the reliability can be increased when there is a structure in which the LDD region overlaps with a gate electrode through a gate insulating film (gate-drain overlapped LDD, GOLD structure). Note that a region in which the LDD region overlaps with the gate electrode through the gate insulating film is referred to as an Lov region (first LDD region) (xe2x80x9covxe2x80x9d indicates xe2x80x9coverlap) in this specification.
Note also that structures such as an LATID (large tilt angle implanted drain) structure and an ITLDD (inverse T LDD) structure are known as GOLD structures. There is a GOLD structure in which sidewalls are formed by silicon, for example, reported in Hatano, M., Akimoto, H, and Sakai, T, IEDM97 Technical Digest, p. 523-6, 1997, and it has been confirmed that an extremely superior reliability can be obtained compared with other TFT structures.
Note that, in this specification, a region in which the LDD region does not overlap with the gate electrode through the gate insulating film is referred to as an Loff region (second LDD region) (xe2x80x9coffxe2x80x9d indicates xe2x80x9coffsetxe2x80x9d) in this specification.
Several methods of manufacturing a TFT possessing both an Loff region and an Lov region have been proposed. A method of using a mask, and a method using a gate electrode having two layers with mutually differing widths and a gate insulating film by self-alignment, can be given as methods of forming the Lov region and the Loff region.
However, two masks are required in order to form the Lov region and the Loff region when using a mask, and the number of process steps is increased. On the other hand, when forming the Lov region and the Loff region by self alignmenit, the number of masks need not be increased, and it is possible to suppress the number of process steps. However, the width of the gate electrode and the thickness of the gate insulating film influence the position in which the Lov region and the Loff region are formed. The etching rates of the gate electrode and the gate insulating film differ, and it is difficult to precisely control the positional alignment of the Lov region and the Loff region.
In view of the above, an object of the present invention is to suppress the number of masks when forming an Lov region and an Loff region, and further, to easily form an Lov region and an Loff region at desired locations. Further, an object of the present invention is realize a crystalline TFT in which good characteristics can be obtained in both an on state and an offstate. Another object of the present invention is to realize a high reliability semiconductor display device having a semiconductor circuit formed by this type of crystalline TFT.
An impurity is added to a semiconductor layer by using a self-aligning manner in which a gate electrode is utilized, and by using a mask, forming an Lov region and an Loff region. The gate electrode is formed from a two layer conducting film, and a layer closer to a semiconductor layer (a first gate electrode) is made longer in a channel longitudinal direction (a channel length direction) than a layer farther from the semiconductor layer (a second electrode).
Note that, in this specification, the term channel longitudinal direction refers to a direction between a source region and a drain region in which a carrier moves.
The lengths of the channel longitudinal direction (carrier movement direction) of the first gate electrode and the second gate electrode (hereafter referred to simply as the gate electrode width) differ in the present invention. By performing ion injection with the first gate electrode and the second gate electrode as masks, and utilizing the difference in ion penetration depth due to the difference in the thicknesses of the gate electrodes, it is therefore possible to make the ion concentration within the semiconductor layer located beneath the second gate electrode lower than the ion concentration within the semiconductor layer located below the first gate electrode, without positioning below the second gate electrode. In addition, it is possible to make the ion concentration within the semiconductor layer located below the first gate electrode lower than the ion concentration of the semiconductor layer not located below the first gate electrode, without positioning below the second gate electrode.
Further, the Loff region is formed using masks, and therefore only the width of the first gate electrode and the width of the second gate electrode must he controlled by etching, and control of the location of the Loff region and the location of the Lov region becomes easy compared to that of conventional examples. Consequently, minute positional alignment of the Lov region and the Loff region becomes easy, and it also becomes easy to manufacture a TFT having desired characteristics.
Structures of the present invention are shown below.
A structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film contacting the semiconductor layer; a first gate electrode contacting the gate insulating film; and a second gate electrode contacting the first gate electrode; characterized in that:
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain reg,ion contacting the LDD regions;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction; and
the LDD regions overlap the first gate electrode, sandwiching the gate insulating film.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film contacting the semiconductor layer; a first gate electrode contacting the gate insulating film; and a second gate electrode contacting the first gate electrode;
characterized in that:
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film; and
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film contacting the semiconductor layer; a first gate electrode contacting the gate insulating film; a second gate electrode contacting the first gate electrode; and an EL element;
characterized in that:
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film;
the EL element has an anode, a cathode, and an EL layer formed between the anode and the cathode; and
the drain region is electrically connected to the anode or the cathode.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film contacting the semiconductor layer; a first gate electrode contacting the gate insulating film; and a second gate electrode contacting the first gate electrode;
characterized in that:
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the first gate electrode has a tapered shape in cross section in an end portion;
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film; and
the channel forming region overlaps with the second gate electrode, andwiching the gate insulating film.
The LDD regions in the above structures may be formed in a self-aligning manner by adding an impurity element into the semiconductor layer with the second gate electrode as a mask.
With the present invention, the concentration of the impurity in the LDD regions at least contains a region having a concentration gradient in a range of 1xc3x971017 to 1xc3x971018 /cm3, and may be characterized in that the impurity element concentration increases as the distance from the channel forming region increases.
Another structure of the present invention is a semiconductor display device having a switching TFT and a driver circuit TFT;
in which:
the switching TFT and the driver circuit TFT each has a semiconductor layer formed on an insulating surface, a gate insulating film contacting the semiconductor layer, a first gate electrode contacting the gate insulating film, and a second gate electrode contacting the first gate electrode;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the semiconductor layer of the switching TFT has a channel forming region overlapping with the second gate electrode, sandwiching the gate insulatinl film; first LDD regions contacting the channel forming region and overlapping with the first gate electrode, sandwiching the gate insulating film; second LDD regions contacting the first LDD regions; and a source region and a drain region contacting the second LDD regions; and
the semiconductor layer of the driver circuit TFT has a channel forming region overlapping with the second gate electrode, sandwiching the gate insulating film; third LDD regions contacting the channel forming region and overlapping with the first gate electrode, sandwiching the gate insulating film; and a source region and a drain region contacting the third LDD regions.
Another structure of the present invention is a semiconductor display device having a switching TFT and a driver circuit TFT;
in which:
the switching TFT and the driver circuit TFT each has a semiconductor layer formed on an insulating surface, a gate insulating film contacting the semiconductor layer, a first gate electrode contacting the gate insulating film, and a second gate electrode contacting the first gate electrode;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the first gate electrode has a tapered shape in cross section in an edge portion;
the semiconductor layer of the switching TFT has a channel forming region overlapping with the second gate electrode, sandwiching the gate insulating film; first LDD regions contacting the channel forming region and overlapping with the first gate electrode, sandwiching the gate insulating film; second LDD regions contacting the first LDD regions; and a source region and a drain region contacting the second LDD regions; and
the semiconductor layer of the driver circuit TFT has a channel forming region overlapping with the second gate electrode, sandwiching the gate insulating film; third LDD regions contacting the channel forming region and overlapping with the first gate electrode, sandwiching the gate insulating film; and a source region and a drain region contacting the third LDD regions.
With the present invention, the concentration of the impurity in the first LDD regions at least contains a region having a concentration gradient in a range of 1xc3x971017 to 1xc3x971018 /cm3, and the impurity element concentration increases as the distance from the channel forming region increases.
With the present invention, the concentration of the impurity in the third LDD regions at least contains a region having a concentration gradient in a range of 1xc3x971017 to 1xc3x971018 /cm3, and the impurity element concentration increases as the distance from the channel forming region increases.
With the present invention, the first LDD regions or the third LDD regions may be formed in a self-aligning manner by adding the impurity to the semiconductor layer with the second gate electrode as a mask.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film; a first gate electrode; a second gate electrode; a first wiring; a second wiring; a first interlayer insulating film; a second interlayer insulating film; and an intermediate wiring;
characterized in that:
the gate insulating film is formed over the insulating surface, covering the semiconductor layer;
the first gate electrode and the first wiring are formed contacting the gate insulating film;
the second gate electrode and the second wiring are formed contacting the first gate electrode and the first wiring, respectively;
the first gate electrode and the first wiring are formed from a first conducting film;
the second gate electrode and the second wiring are formed from a second conducting film;
the first interlayer insulating film is formed covering: the first gate electrode; the second gate electrode; the first wiring; the second wiring; and the gate insulating film;
the second interlayer insulating film is formed over the first interlayer insulating film;
the intermediate wiring is formed covering the second interlayer insulating film, and so as to contact the first interlayer insulating film through a contact hole formed in the second interlayer insulating film;
the intermediate wiring overlaps with the second wiring through the first interlayer insulating film in the contact hole;
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the width of the first gate electrode in a channel longitudinal direction is wider than the width of the second gate electrode in the channel longitudinal direction;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film; and
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film; a first gate electrode; a second gate electrode; a first wiring; a second wiring; a first interlayer insulating film; a second interlayer insulating film; an intermediate wiring; and an EL element;
characterized in that:
the gate insulating film is formed over the insulating surface, covering the semiconductor layer;
the first gate electrode and the first wiring are formed contacting the gate insulating film;
the second gate electrode and the second wiring are formed contacting the first gate electrode and the first wiring, respectively;
the first gate electrode and the first wiring are formed from a first conducting film;
the second gate electrode and the second wiring are formed from a second conducting film;
the first interlayer insulating film is formed covering: the first gate electrode; the second gate electrode; the first wiring; the second wiring; and the gate insulating film;
the second interlayer insulating film is formed over the first interlayer insulating film;
the intermediate wiring is formed covering the second interlayer insulating film, and so as to contact the first interlayer insulating film through a first contact hole formed in the second interlayer insulating film;
the intermediate wiring overlaps with the second wiring through the first nterlayer insulating film in the first contact hole;
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film;
the intermediate wiring is connected to the source region through a second contact hole formed in: the gate insulating film; the first interlaycr insulating film; and the second interlayer insulating film;
the EL element has an anode, a cathode, and an EL layer formed between the anode and the cathode; and
the drain region is electrically connected to the anode or the cathode.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film; a first gate electrode; a second gate electrode; a first wiring; a second wiring; a first interlayer insulating film; a second interlayer insulating film; an intermediate wiring; and a shielding film;
characterized in that:
the gate insulating film is formed on the insulating surface, covering the semiconductor layer;
the first gate electrode and the first wiring are formed contacting the gate insulating film;
the second gate electrode and the second wiring are formed contacting the first gate electrode and the first wiring, respectively;
the first gate electrode and the first wiring are formed from a first conducting film;
the second gate electrode and the second wiring are formed from a second conducting film;
the first interlayer insulating film is formed covering: the first gate electrode; the second gate electrode; the first wiring; the second wiring; and the gate insulating film;
the second interlayer insulating film is formed over the first interlayer insulating film;
the intermediate wiring is formed covering the second interlayer insulating film, and so as to contact the first interlayer insulating film through a contact hole formed in the second interlayer insulating film;
the intermediate wiring overlaps with the second wiring through the first interlayer insulating film in the contact hole;
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film;
the shielding film is formed from the same conducting film as the intermediate wiring; and
the shielding film is formed on the second interlayer insulating film, and so as to overlap the channel forming region.
Another structure of the present invention is a semiconductor display device having: a semiconductor layer formed on an insulating surface; a gate insulating film; a first gate electrode; a second gate electrode; a first wiring; a second wiring; a first interlayer insulating film; a second interlaycr insulating film; an intermediate wiring; a shielding film; and an EL element;
characterized in that:
the gate insulating film is formed on the insulating surface, covering the semiconductor layer;
the first gate electrode and the first wiring are formed contacting the gate insulating film;
the second gate electrode and the second wiring are formed contacting the first gate electrode and the first wiring, respectively;
the first gate electrode and the first wiring are formed from a first conducting film;
the second gate electrode and the second wiring are formed from a second conducting film;
the first interlayer insulating film is formed covering: the first gate electrode; the second gate electrode; the first wiring; the second wiring; and the gate insulating film;
the second interlayer insulating film is formed over the first interlayer insulating film;
the intermediate wiring is formed covering the second interlayer insulating film, and so as to contact the first interlayer insulating film through a first contact hole formed in the second interlayer insulating film;
the intermediate wiring overlaps with the second wiring through the first interlayer insulating film in the first contact hole;
the semiconductor layer has a channel forming region, LDD regions contacting the channel forming region, and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film;
the intermediate wiring is connected to the source region through a second contact hole formed in: the gate insulating film; the first interlayer insulating film; and the second interlayer insulating film;
the shielding film is formed from the same conducting film as the intermediate wiring; and
the shielding film is formed on the second interlayer insulating film, and so as to overlap the channel forming region;
the EL element has an anode, a cathode, and an EL layer formed between the anode and the cathode; and
the drain region is electrically connected to the anode or the cathode.
Another structure of the present invention is a semiconductor display device having: a light shielding film formed over a substrate; an insulating film formed over the substrate, covering the light shielding film; a semiconductor layer formed on the insulating film; a gate insulating film contacting the semiconductor layer; a first grate electrode contacting the gate insulating film; and a second gate electrode contacting the first gate electrode;
characterized in that:
the semiconductor layer has: a channel forming region; LDD regions contacting the channel forming region; and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gate insulating film, sandwiching the gate insulating film; and
the light shielding film overlaps with the channel forming region through the insulating film.
Another structure of the present invention is a semiconductor display device having: a light shielding film formed over a substrate; an insulating film formed over the substrate, covering the light shielding film; a semiconductor layer formed on the insulating film; a gate insulating film contacting the semiconductor layer; a first gate electrode contacting the gate insulating film; a second gate electrode contacting the first gate electrode; and an EL element;
characterized in that:
the semiconductor layer has: a channel forming region; LDD regions contacting the channel forming region; and a source region and a drain region contacting the LDD regions;
the LDD regions overlap with the first gate electrode, sandwiching the gate insulating film;
the channel forming region overlaps with the second gatc insulating film, sandwiching the gate insulating film;
the light shielding film overlaps with the channel forming region through the insulating film;
the EL element has an anode, a cathode, and an EL layer formed between the anode and the cathode; and
the drain region is electrically connected to the anode or the cathode.
The insulating film in the above structures may also be leveled by CMP polishing with the present invention.
The present invention may also be: a video camera; an image reproduction device; a head mounted display; or a personal computer; in which the semiconductor display device is used.
Another structure of the present invention is a method of manufacturing a semiconductor display device, having the steps of:
forming a semiconductor layer on an insulating surface;
forming a gate insulating film over the insulating surface, covering the semiconductor layer;
forming a first conducting film on the gate insulating film;
forming a second conducting film on the first conducting film;
patterning the first conducting film and the second conducting film, forming a first gate electrode and a second gate electrode;
adding a first impurity to the semiconductor layer from a side where the first gate electrode and the second gate electrode are formed; and
forming a mask on the semiconductor layer, covering the first gate electrode and the second gate electrode; and
forming a channel forming region, first LDD regions contacting the channel forming region, second LDD regions contacting the first LDD regions, and a source region and a drain region contacting the second LDD regions by adding a second impurity having the same type of conductivity as that of the first impurity from a side where the mask is formed on the semiconductor layer; characterized in that:
the first gate electrode is longer than the second gate electrode in a channel longitudinal direction;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film; and
the first LDD regions overlap with the first gate electrode, sandwiching the gate insulating film.
Another structure of the present invention is a method of manufacturing a semiconductor display device, having the steps of:
forming a semiconductor layer on an insulating surface;
forming a gate insulating film over the insulating surface, covering the semiconductor layer;
forming a first conducting film on the gate insulating film;
forming a second conducting film on the first conducting film;
patterning the first conducting film and the second conducting film, forming a first gate electrode and a second gate electrode;
adding a first impurity to the semiconductor layer from a side where the first gate electrode and the second gate electrode of the semiconductor layer are formed; and
forming a mask on the semiconductor layer, covering the first gate electrode and the second gate electrode; and
forming a channel forming region, first LDD regions contacting the channel forming region, second LDD regions contacting the first LDD regions, and a source region and a drain region contacting the second LDD regions by adding a second impurity having the same type of conductivity as that of the first impurity from a side where the mask is formed on the semiconductor layer;
characterized in that:
the first gate electrode is longer than the second gate electrode in a channel longitudinal direction;
the channel forming region overlaps with the second gate electrode, sandwiching the gate insulating film; and
the first LDD regions overlap with the first gate electrode, sandwiching the gate insulating film.
Another structure of the present invention is a method of manufacturing a semiconductor display device, having the steps of:
forming a semiconductor layer on an insulating surface;
forming a gate insulating film over the insulating surface, contacting the semiconductor layer;
forming a first gate electrode and a first shape second gate electrode contacting the gate insulating film;
etching the first gate electrode and the first shape second gate electrode, forming a first gate electrode having a tapered portion and a second shape second gate electrode;
adding an impurity element which imparts one conductivity type through the gate insulating film and into the semiconductor layer, forming second LDD regions; and at the same time adding an impurity element which imparts one conductivity type through the tapered portion of the first gate electrode and into the semiconductor layer, forming first LDD regions in which the impurity concentration increases toward an edge portion of the semiconductor layer; and
adding an impurity element which imparts a one conductivity type with the first gate electrode having the tapered portion and the second shape second gate electrode as masks, forming a source region or a drain region.